Transactional memory

Author(s)

Bibliographic Information

Transactional memory

Tim Harris, James Larus, Ravi Rajwar

(Synthesis lectures on computer architecture, 2)

Morgan & Claypool, c2007

  • :pbk.

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Description and Table of Contents

Description

The advent of multicore processors has renewed interest in the idea of incorporating transactions into the programming model used to write parallel programs. This approach, known as transactional memory, offers an alternative, and hopefully better, way to coordinate concurrent threads. The ACI (atomicity, consistency, isolation) properties of transactions provide a foundation to ensure that concurrent reads and writes of shared data do not produce inconsistent or incorrect results. At a higher level, a computation wrapped in a transaction executes atomically - either it completes successfully and commits its result in its entirety or it aborts. In addition, isolation ensures the transaction produces the same result as if no other transactions were executing concurrently. Although transactions are not a parallel programming panacea, they shift much of the burden of synchronizing and coordinating parallel computations from a programmer to a compiler, runtime system, and hardware. The challenge for the system implementers is to build an efficient transactional memory infrastructure. This book presents an overview of the state of the art in the design and implementation of transactional memory systems, as of early summer 2006.

Table of Contents

Introduction Programming Transactional Memory Software Transactional Memory Hardware-Supported Transactional Memory Conclusions

by "Nielsen BookData"

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Details

  • NCID
    BD02027036
  • ISBN
    • 9781598291247
  • Country Code
    us
  • Title Language Code
    eng
  • Text Language Code
    eng
  • Place of Publication
    [San Rafael, Calif.]
  • Pages/Volumes
    xiii, 211 p.
  • Size
    24 cm
  • Parent Bibliography ID
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