Guide to computer processor architecture : a RISC-V approach, with high-level synthesis

Author(s)

• Goossens, Bernard

Bibliographic Information

Guide to computer processor architecture : a RISC-V approach, with high-level synthesis

Bernard Goossens

（Undergraduate topics in computer science）

Springer, c2023

• : [pbk.]

Note

Includes biblioraphical references and index

Details

• NCID: BD0444816X
• ISBN:
  • 9783031180224
• Country Code: sz
• Title Language Code: eng
• Text Language Code: eng
• Place of Publication: Cham
• Pages/Volumes: xxv, 438 p.
• Size: 24 cm
• Classification:
  • DC23 : 004.22
• Subject Headings:
  • LCSH : Computer architecture
  • LCSH : RISC microprocessors
• Parent Bibliography ID:
  • BA82020819