中井 一貴 , Chammika Mannakkara , Vijay Holimath , 米田 友洋

近年，車載ECU(Electronic Control Unit)をいくつかまとめてメニコアシステム上で実現する，統合化ECUが研究されている．我々は，マルチチップNoC(Network-on-Chip)に基づく統合化ECUプラットフォームに，高度な実問題を扱う車載アプリケーションを搭載し，HIL(Hardware-In-the-Loop)シミュレーションにより，タスクの高信頼化実行が行えることを …

研究報告組込みシステム（EMB） 2013-EMB-28(46), 1-6, 2013-03-06

SAITO Hiroshi , YONEDA Tomohiro , NAKAMURA Yuichi

This paper proposes a multi-task scheduling and allocation method to realize a reliable NoC. For the given NoC model and upper bound of the number of failed nodes, the proposed method enumerates all f …

Technical report of IEICE. VLD 112(451), 61-66, 2013-03-04

YONEDA Tomohiro , IMAI Masashi

The Journal of Reliability Engineering Association of Japan 35(8), 482, 2013

J-STAGE 

SAITO Hiroshi , YONEDA Tomohiro , NAKAMURA Yuicih

This paper proposes a multiple task allocation method for given NoC model, task graph, and the number of expected failure NoC nodes. This method maximizes executable failure patterns for the number of …

Technical report of IEICE. VLD 111(324), 147-152, 2011-11-28

SAITO Hiroshi , YONEDA Tomohiro , NAKAMURA Yuichi

電子情報通信学会技術研究報告. DC, ディペンダブルコンピューティング : IEICE technical report 111(325), 147-152, 2011-11-21

References (18)

YONEDA Tomohiro

IEICE technical report 110(3), 1, 2010-04-06

齋藤 寛 , 濱田 尚宏 , 米田 友洋 [他]

IEICE technical report 109(315), 143-148, 2009-12-02

Cited by (3)

ONIZAWA Naoya , MATSUMOTO Atsushi , HANYU Takahiro , YONEDA Tomohiro

This paper presents a robust on-chip asynchronous data-trasnfer circuit based on multi-level current-mode signalling under the power-supply/voltage and process variations. Since distance between two m …

IEICE technical report 109(169), 1-6, 2009-07-29

References (6)

YONEDA Tomohiro , IMAI Masashi , MATSUMOTO Atsushi , HANYU Takahiro , NAKAMURA Yuichi

Recent advances in semiconductor process technologies cause new types of faults, which should be handled in order to obtain large and dependable VLSI systems. This report focuses on a type of faults t …

IEICE technical report 108(15), 55-60, 2008-04-23

References (6)

MATSUMOTO Atsushi , YONEDA Tomohiro , HANYU Takahiro

In this paper, we propose the method to implement asynchronous circuits on FPGA. The circuits are generated by the automation process we proposed. This proposition consists of two topics, insertion of …

IEICE technical report 107(174), 25-30, 2007-08-02

References (7)