山下 毅雄 YAMASHITA Takeo

ID:9000004753299

東北大学工学部電子工学科 Department of Electronic Engineering, Tohoku University (1995年 CiNii収録論文より)

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Articles:  1-3 of 3

  • A Neuron-MOS Data Sorting Circuit

    NAKAI Tsutomu , SHIBATA Tadashi , YAMASHITA Takeo , OHMI Tadahiro

    This paper presents a unique circuit architecture for data sorting being entirely carried out on the hardware without any software manipulation. Multiple analog input data are numbered in binary codes …

    Technical report of IEICE. SDM 95(195), 87-92, 1995-07-28

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  • Neuron-MOS Multiple-Valued Intelligent Memory Technology  [in Japanese]

    Shibata Tadashi , Au RITA , 山下 毅雄 , 大見 忠弘

    Multiple-valued memory featuring gain-cell structure,multivalued sensing,quick-readout,and self-quantization of incoming analog data is presented.Additionally,high-functionality multiple-valued RAM pe …

    IEICE technical report. Computer systems 94(15), 1-8, 1994-04-22

  • Neuron MOS Winner-Take-All Circuit and Its Application to Associative Memory  [in Japanese]

    Shibata Tadashi , Yamashita Takeo , Ohmi Tadahiro

    A winner-take-all circuit has been constructed in a very simple manner using a highly functional device called neuron MOSFET(abbreviated as νMOS)which simulates the behavior of biologi cal neurons.The …

    Technical report of IEICE. ICD 93(231), 31-38, 1993-09-17

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