新田 伸一 NITTA Shinichi

ID:9000005107299

株式会社東芝セミコンダクター社 Semiconductor Company, Toshiba Corporation (2002年 CiNii収録論文より)

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Articles:  1-2 of 2

  • An Embedded DRAM Technology with SOI/Bulk Hybrid Substrate for High-End SoC Application  [in Japanese]

    YAMADA Takashi , TAKAHASHI Kazumi , OYAMATSU Hisato , NAGANO Hajime , SATO Tsutomu , MIZUSHIMA Ichiro , NITTA Shinichi , HOJI Takehiko , KOKUBUN Koichi , YASUMOTO Kaori , MATSUBARA Yoshinori , YOSHIDA Takeshi , YAMADA Seiji , TSUNASHIMA Yoshitaka , SAITO Yoshihiko , NADAHARA Souichi , KATSUMATA Yasuhiro , YOSHIMI Makoto , ISHIUCHI Hidemi

    A new methodology to form highly accomplished SOT/Bulk hybrid wafers with conventional in-line processes is proposed. Since the SOI/Bulk hybrid wafer has both SOI (Silicon On Insulator) substrate regi …

    Technical report of IEICE. ICD 102(273), 47-51, 2002-08-15

    References (8)

  • An Embedded DRAM Technology with SOI/Bulk Hybrid Substrate for High-End SoC Application  [in Japanese]

    YAMADA Takashi , TAKAHASHI Kazumi , OYAMATSU Hisato , NAGANO Hajime , SATO Tsutomu , MIZUSHIMA Ichiro , NITTA Shinichi , HOJI Takehiko , KOKUBUN Koichi , YASUMOTO Kaori , MATSUBARA Yoshinori , YOSHIDA Takeshi , YAMADA Seiji , TSUNASHIMA Yoshitaka , SAITO Yoshihiko , NADAHARA Souichi , KATSUMATA Yasuhiro , YOSHIMI Makoto , ISHIUCHI Hidemi

    A new methodology to form highly accomplished SOI/Bulk hybrid wafers with conventional in-line processes is proposed. Since the SOI/Bulk hybrid wafer has both SOI (Silicon On Insulator) substrate regi …

    Technical report of IEICE. SDM 102(271), 47-51, 2002-08-15

    References (8)

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