宮嶋 隆司 MIYAJIMA Takashi

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  • Placement Time Optimization of Chip Mounter by GA Adopting Viral Infection.  [in Japanese]

    MIYAJIMA Takashi , KOITABAShi Tatsuo

    This paper presents a placement time optimization method of chip mounter. Placement time varies for chip mouters where a PCB(printed circuit board)and tape feeder position are fixed, with parts placem …

    TRANSACTIONS OF THE JAPAN SOCIETY OF MECHANICAL ENGINEERS Series C 66(645), 1621-1628, 2000

    J-STAGE 

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