Logic minimization algorithms for VLSI synthesis

著者

• Brayton, Robert King

書誌事項

Logic minimization algorithms for VLSI synthesis

by Robert K. Brayton [et al.]

（The Kluwer international series in engineering and computer science, SECS 2 . VLSI, computer architecture, and digital signal processing）

Kluwer Academic Publishers, c1984

タイトル別名

Logic minimization algorithms for V.L.S.I. synthesis

注記

Bibliography: p. [174]-190

Includes index

詳細情報

• NII書誌ID(NCID): BA00237874
• ISBN:
  • 0898381649
• LCCN: 84015490
• 出版国コード: us
• タイトル言語コード: eng
• 本文言語コード: eng
• 出版地: Boston
• ページ数/冊数: ix, 193 p.
• 大きさ: 25 cm
• 分類:
  • LCC : TK7868.L6
  • DC19 : 621.381/73
• 件名:
  • LCSH : Logic design
  • LCSH : Integrated circuits -- Very large scale integration
  • LCSH : Integrated circuits -- Design and construction -- Data processing
  • LCSH : Algorithms
• 親書誌ID:
  • BA0004729X