Tutorial test generation for VLSI chips

著者

• Agrawal, Vishwani D.
• Seth, Sharad C.

書誌事項

Tutorial test generation for VLSI chips

[edited by] Vishwani D. Agrawal and Sharad C. Seth

IEEE Computer Society Press , Order from IEEE Computer Society, c1988

• : casebound
• : microfiche

タイトル別名

Test generation for VLSI chips

注記

A collection of reprints of articles originally published from 1967 to 1988

Includes bibliographies

"Computer Society order number 786."

IEEE catalog number EH0278-2."

内容説明・目次

内容説明

Reprints of papers taken from 18 different journals, published between 1967 and 1987. They give a comprehensive overview of very large-scale integration testing. No significant prior experience in testing is assumed. Concepts and current practices are emphasized. Chapters are preceded by a tutorial.

「Nielsen BookData」 より

詳細情報

• NII書誌ID(NCID): BA07449360
• ISBN:
  • 081868786X
  • 0818647868
• LCCN: 88061362
• 出版国コード: us
• タイトル言語コード: eng
• 本文言語コード: eng
• 出版地: Washington, D.C.,Los Angeles, CA
• ページ数/冊数: x, 401 p.
• 大きさ: 29 cm