Reconfigurable massively parallel computers
著者
書誌事項
Reconfigurable massively parallel computers
Prentice Hall, 1991
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注記
Includes bibliographical references
内容説明・目次
内容説明
The majority of the supercomputers and parallel computers in use today consist of a small amount of homogeneous or heterogeneous processors. The task of a computer architect is to search for a point of compromise (or comfort) in this vast design space which such computers open up, according to his/her experience. The task becomesa particularly complex one in the vastly bigger processing space opened up by reconfigurable massively parallel computers consisting of tens of thousands or even millions of processors. New techniques are needed for the design and use of massively parallel computers. This book deals with the problems of dimensionality that arise from this massive parallelism by addressing the principle of reconfiguration. The text addresses three fundamental issues in reconfigurable massively parallel computers - architecture, mapping algorithms to the architecture and fault-tolerance.
The three subject areas covered are intended to be of interest to students on architecture courses and on parallel algorithm or parallel programming courses who could use it as a complementary reference book and engineers working on projects based on massively parallel computers who could use it as a reference resource. Researchers in the area of massively parallel processing should find the book offers guidance to other related research issues. Those who are interested in future products based on massively parallel processing may find the book's prototype design relevant to their work and useful as a guide in the early design stage.
目次
- Reconfigurable massively parallel computers
- polymorphic VLSI arrays with distributed control
- implementation and application of A gated-connection network in image understanding
- reconfiguration in the low and intermediate levels of the image understanding architecture
- reconfigurable arrays using local autonomy
- embedding pyramid into mesh arrays
- hypercube - a reconfigurable mesh
- arrays for digital signal processing functions - fault tolerance and functional reconfiguration
- fault-tolerant rectangular array processors via reconfiguration.
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