High-performance computer architecture

書誌事項

High-performance computer architecture

Harold S. Stone

(Addison-Wesley series in electrical and computer engineering)

Addison-Wesley, c1993

3rd ed

大学図書館所蔵 件 / 17

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注記

"References": p. 481-490

"Index and glossary": p. 491-512

内容説明・目次

内容説明

This update of the popular book on computer architecture presents design ideas embodied in many high-performance machines and stresses techniques for evaluating them. Stone develops a proper understanding of the design process by treating the various trade-offs that exist in designing choices, and shows how good designs make efficient use of technology. Features *Teaches techniques for the design and analysis of high-performance machines *Develops students' intuition for design by treating various tradeoffs that exist in design choices *Discusses many important topics: RISC architectures, interconnection meshes, Cache coherent and multiprocessors, and Cache Memory. *Includes enhanced descriptions of RISC Processors *Expands material on Cache Memory Analysis *Current technology in RISC with a focused look on super scalar *Additional memory models and techniques for doing Cache design *New porposals for coherent memory systems in System C parallel processors *Both design and thought problems and problems with limiting parameters are provided 0201526883B04062001

目次

1. Introduction. 2. Memory-System Design. 3. Pipeline Design Techniques. 4. Characteristics of Numerical Applications. 5. Vector Computers. 6. Multiprocessors. 7. Multiprocessor Algorithms.

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詳細情報

  • NII書誌ID(NCID)
    BA19688857
  • ISBN
    • 0201526883
  • LCCN
    92032243
  • 出版国コード
    us
  • タイトル言語コード
    eng
  • 本文言語コード
    eng
  • 出版地
    Reading, Mass.
  • ページ数/冊数
    xvi, 512 p.
  • 大きさ
    25 cm
  • 分類
  • 件名
  • 親書誌ID
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