The complexity of simple computer architectures

書誌事項

The complexity of simple computer architectures

Silvia M. Müller, Wolfgang J. Paul

(Lecture notes in computer science, 995)

Springer-Verlag, c1995

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注記

Bibliography: p. [263]-265

Includes index

内容説明・目次

内容説明

This book presents a formal model for evaluating the cost effectiveness of computer architectures. The model can cope with a wide range of architectures, from CPU design to parallel supercomputers. To illustrate the formal procedure of trade-off analyses, several non-pipelined design alternatives for the well-known RISC architecture called DLX are analyzed quantitatively. It is formally proved that the interrupt mechanism proposed for the DLX architecture handles nested interrupts correctly. In an appendix all programs to compute the cost and cycle time of the designs described are listed in C code. Running these simple C programs on a PC is sufficient to verify the results presented. The book addresses design professionals and students in computer architecture.

目次

The formal architecture model.- Functional modules.- Hardwired control.- Design of a minimal CPU.- Design of the DLX machine.- Trade-off analyses.- Interrupt.- Microprogrammed control.- Further applications of the architecture model.

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詳細情報

  • NII書誌ID(NCID)
    BA26347222
  • ISBN
    • 3540605800
  • LCCN
    95045657
  • 出版国コード
    gw
  • タイトル言語コード
    eng
  • 本文言語コード
    eng
  • 出版地
    Berlin ; New York ; Tokyo
  • ページ数/冊数
    xii, 270 p.
  • 大きさ
    24 cm
  • 分類
  • 件名
  • 親書誌ID
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