The Verilog hardware description language
著者
書誌事項
The Verilog hardware description language
Kluwer, c1996
3rd ed
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注記
Includes index
内容説明・目次
内容説明
The text starts with a tutorial introduction which presents the major features of the language by example. It then continues with a more complete discussion of the language constructs. A formal description of the language is provided in the appendix.
目次
1. Verilog - a Tutorial Introduction. 2. Behavioural Modelling. 3. Concurrent Processes. 4. Logic Level Modelling. 5. Advanced Timing. 6. Synthesis. 7. User-Defined Primitives. 8. Switch Level Modelling. 9. Projects. Appendix A: Lexical Conventions. Appendix B: Verilog Operators. Appendix C: Verilog Gate Types. Appendix D: Registers, Memories, Integers, and Time. Appendix E: System Tasks and Functions. Appendix F: Formal Syntax Definition.
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