Quick-turnaround ASIC design in VHDL : core-based behavioral synthesis

著者

• Romdhane, Mohamed S. Ben
• Madisetti, V. (Vijay)
• Hines, John W.

書誌事項

Quick-turnaround ASIC design in VHDL : core-based behavioral synthesis

Mohamed S. Ben Romdhane, Vijay K. Madisetti, John W. Hines

（The Kluwer international series in engineering and computer science, SECS 367 . VLSI, computer architecture, and digital signal processing）

Kluwer Academic Publishers, c1996

注記

Includes bibliographical references (p. 171-177) and index

詳細情報

• NII書誌ID(NCID): BA28733533
• ISBN:
  • 0792397444
• LCCN: 96019108
• 出版国コード: us
• タイトル言語コード: eng
• 本文言語コード: und
• 出版地: Boston
• ページ数/冊数: xviii, 180 p.
• 大きさ: 25 cm
• 分類:
  • LCC : TK7874.6
  • DC20 : 621.382/2/0285
• 件名:
  • LCSH : Application specific integrated circuits -- Design -- Data processing
  • LCSH : VHDL (Computer hardware description language)
  • LCSH : Computer-aided design
• 親書誌ID:
  • BA0004729X