The VLSI handbook

著者

• Chen, Wai-Kai

書誌事項

The VLSI handbook

editor-in-chief, Wai-Kai Chen

（The electrical engineering handbook series）

CRC Press, c2000

注記

A CRC handbook published in cooperation with IEEE Press

Includes bibliographical references and index

内容説明・目次

内容説明

Over the years, the fundamentals of VLSI technology have evolved to include a wide range of topics and a broad range of practices. To encompass such a vast amount of knowledge, The VLSI Handbook focuses on the key concepts, models, and equations that enable the electrical engineer to analyze, design, and predict the behavior of very large-scale integrated circuits. It provides the most up-to-date information on IC technology you can find. Using frequent examples, the Handbook stresses the fundamental theory behind professional applications. Focusing not only on the traditional design methods, it contains all relevant sources of information and tools to assist you in performing your job. This includes software, databases, standards, seminars, conferences and more. The VLSI Handbook answers all your needs in one comprehensive volume at a level that will enlighten and refresh the knowledge of experienced engineers and educate the novice. This one-source reference keeps you current on new techniques and procedures and serves as a review for standard practice. It will be your first choice when looking for a solution.

目次

VLSI VLSI Technology: A System Perspective CMOS/BiCMOS Technology Bipolar Technology Silicon on Insulator Technology SiGe Technology SiC Technology Passive Components Power IC Technologies Noise in VLSI Technologies Micromachining Microelectronics Packaging Multichip Module Technologies Channel Hot Electron Degradation-Delay in MOS Transistors Due to Deuterium Anneal Devices and Their Models Bipolar Junction Transistor (BJT) Circuits RF Passive IC Components Circuit Simulations Analog Circuit Simulation Interconnect Modeling and Simulation Power Simulation and Estimation in VLSI Circuits Amplifiers CMOS Amplifier Design Bipolar Amplifier Design High-Frequency Amplifiers Operational Transconductance Amplifiers Logic Circuits Expressions of Logic Functions Basic Theory of Logic Functions Simplification of Logic Expressions Binary Decision Diagrams Logic Synthesis with AND and OR Gates in Two Levels Sequential Networks with AND and OR Gates Logic Synthesis with AND and OR Gates in Multi-Levels Logic Properties of Transistor Circuits Logic Synthesis with NAND (or NOR) Gates in Multi-Levels Logic Synthesis with a Minimum Number of Negative Gates Logic Synthesizer with Optimizations in Two Phases Logic Synthesizer by the Transduction Method Emitter-Coupled Logic CMOS Pass Transistors Adders Multipliers Dividers Full-Custom and Semi-Custom Design Programmable Logic Devices Gate Arrays Field-Programmable Gate Arrays Cell-Library Design Approach Comparison of Different Design Approaches Memory, Registers, and System Timing System Timing ROM/PROM/EPROM SRAM Embedded Memory Flash Memories Dynamic Random Access Memory Low-Power Memory Circuits Analog Circuits Nyquist-Rate ADC and DAC Oversampled Analog-to-Digital and Digital-to-Analog Converters RF Communication Circuits PLL Circuits Continuous-Time Filters Switched-Capacitor Filters Microprocessor and ASIC Timing and Signal Integrity Analysis Microprocessor Design Verification Microprocessor Layout Method Architecture ASIC Design Logic Synthesis for Field Programmable Gate Array (FPGA) Technology Test and Testability Testability Concepts and DFT ATPG and BIST CAD Tools for BIST/DFT and Delay Faults Compound Semiconductor Digital Integrated Circuit Technology Materials Compound Semiconductor Devices for Digital Circuits Logic Design Principles and Examples Logic Design Examples Design Automation Internet Based Micro-Electronic Design Automation (IMEDA) Framework System -Level Design Synthesis at the Register Transfer Level and the Behavioral Level Performance Modeling and Analysis in VHDL Embedded Computing Systems and Hardware/Software Co-Design Design Automation Technology Roadmap Algorithms and Architect Algorithms and Architectures for Multimedia and Beamforming Array Processings in Communication Systems Design Languages Design Languages Hardware Description in Verilog: An Introductory Tutorial

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詳細情報

• NII書誌ID(NCID): BA45349575
• ISBN:
  • 0849385938
• 出版国コード: us
• タイトル言語コード: eng
• 本文言語コード: eng
• 出版地: Boca Raton, Fla
• ページ数/冊数: 1 v. (various paging)
• 大きさ: 26 cm
• 分類:
  • LCC : TK7874.75.V573
  • DC21 : 621.39/5
• 件名:
  • LCSH : Integrated circuits -- Very large scale integration
• 親書誌ID:
  • BA25417912