Records of the 2000 IEEE International Workshop on Memory Technology, Design and Testing, August 7-8, 2000, San Jose, California, USA

書誌事項

Records of the 2000 IEEE International Workshop on Memory Technology, Design and Testing, August 7-8, 2000, San Jose, California, USA

edited by R. Rajsuman, T. Wik ; sponsored by IEEE Computer Society, IEEE Computer Society Technical Committee on VLSI, IEEE Computer Society Technical Council on Test Technology ; in cooperation with The IEEE Solid State Circuits Society

Institute of Electrical and Electronics Engieers, c2000

  • :case.

タイトル別名

PR00689

Memory Technology, Design and Testing

MTDT 2000

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注記

"IEEE Computer Society Order Number PR00689"--T.p. verso

Includes bibliographical references and index

内容説明・目次

内容説明

Nineteen papers and a keynote address comprise the proceedings of this August 2000 workshop. The papers are organized into sections on failure mechanisms and defects, flash and EEPROM design, new ideas, test and yield, memory testing and built-in self-test, memory design, and diagnosis. Specific top

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詳細情報

  • NII書誌ID(NCID)
    BA48496452
  • ISBN
    • 0769506895
    • 0769506909
  • 出版国コード
    us
  • タイトル言語コード
    eng
  • 本文言語コード
    eng
  • 出版地
    Los Alamitos, Calif.
  • ページ数/冊数
    x, 131 p.
  • 大きさ
    28 cm
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