Automatic layout modification : including design reuse of the Alpha CPU in 0.13 micron SOI technology
Author(s)
Bibliographic Information
Automatic layout modification : including design reuse of the Alpha CPU in 0.13 micron SOI technology
Kluwer Academic Publishers, c2002
Available at 7 libraries
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Note
Includes bibliographical references and index
Description and Table of Contents
Description
This volume is a welcome effort towards improving some of the practices in chip design today. The authors provide a comprehensive reference work on Automatic Layout Modification which will be valuable to VLSI courses at universities, and to CAD and circuit engineers and engineering managers.
Table of Contents
Foreword. Acknowledgments.
1. Introduction to IC Physical Design Reuse.
2. Physical Design Reuse in the SOC Era: Luxury or Necessity?
3. Boosting Design Capabilities with Automatic Layout Modification Technology.
4. Characteristics and Functionalities of an Automatic Layout Modification Tool Suite.
5. Integrating Automatic Layout Modification Technology and Physical Design Reuse into Existing Design Flows.
6. Applying Physical Design Reuse to Different Design Types with Automatic Layout Modification Technology.
7. Layout Guidelines for Physical Design Reuse and Automatic Layout Modification.
8. Guide to Physical Design Reuse Tools: Uses and Functions.
9. General Layout Modification Design Flow as Applied to the Alpha CPU Migration.
10. Aspects of Memory Conversion Projects.
11. Aspects of Library Conversion Projects.
Appendix 1: Key Algorithms Used for Automatic Layout Modification Technology.
Bibliography. Glossary. Index.
by "Nielsen BookData"