Design of high-speed communication circuits

書誌事項

Design of high-speed communication circuits

editor, Ramesh Harjani

(Selected topics in electronics and systems, v. 38)

World Scientific, c2006

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注記

Includes bibliographical references

内容説明・目次

内容説明

MOS technology has rapidly become the de facto standard for mixed-signal integrated circuit design due to the high levels of integration possible as device geometries shrink to nanometer scales. The reduction in feature size means that the number of transistor and clock speeds have increased significantly. In fact, current day microprocessors contain hundreds of millions of transistors operating at multiple gigahertz. Furthermore, this reduction in feature size also has a significant impact on mixed-signal circuits. Due to the higher levels of integration, the majority of ASICs possesses some analog components. It has now become nearly mandatory to integrate both analog and digital circuits on the same substrate due to cost and power constraints. This book presents some of the newer problems and opportunities offered by the small device geometries and the high levels of integration that is now possible.The aim of this book is to summarize some of the most critical aspects of high-speed analog/RF communications circuits. Attention is focused on the impact of scaling, substrate noise, data converters, RF and wireless communication circuits and wireline communication circuits, including high-speed I/O.

目次

Nanometer CMOS Substrate Noise High-speed ADCs Frequency Synthesizers Wireless and Wireline Communications

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詳細情報

  • NII書誌ID(NCID)
    BA77795468
  • ISBN
    • 9812565906
  • 出版国コード
    us
  • タイトル言語コード
    eng
  • 本文言語コード
    eng
  • 出版地
    Hackensack, N.J.
  • ページ数/冊数
    vii, 222 p.
  • 大きさ
    26 cm
  • 分類
  • 件名
  • 親書誌ID
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