Networks on chips : technology and tools

Bibliographic Information

Networks on chips : technology and tools

Luca Benini and Giovanni De Micheli

(The Morgan Kaufmann series in systems on silicon / Peter J. Ashenden, Wayne Wolf, series editors)

Morgan Kaufmann Publishers , Elsevier, c2006

Available at  / 15 libraries

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Includes bibliographical references and index

Description and Table of Contents

Description

The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution. This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions.

Table of Contents

I. Introduction and Motivation II. Architectures for NoCs III. Physical network layer IV. Data-link layer and encoding V. Switching and Routing in NoCs VI. Software for NoCs VII. Tools for NoC Design VIII. On-Chip multiprocessors IX. SoCs based on NoCs Examples of other design chips using NoCs

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