Computer aided verification : 18th International Conference, CAV 2006, Seattle, WA, USA, August 17-20, 2006 : proceedings
著者
書誌事項
Computer aided verification : 18th International Conference, CAV 2006, Seattle, WA, USA, August 17-20, 2006 : proceedings
(Lecture notes in computer science, 4144)
Springer, c2006
大学図書館所蔵 全12件
  青森
  岩手
  宮城
  秋田
  山形
  福島
  茨城
  栃木
  群馬
  埼玉
  千葉
  東京
  神奈川
  新潟
  富山
  石川
  福井
  山梨
  長野
  岐阜
  静岡
  愛知
  三重
  滋賀
  京都
  大阪
  兵庫
  奈良
  和歌山
  鳥取
  島根
  岡山
  広島
  山口
  徳島
  香川
  愛媛
  高知
  福岡
  佐賀
  長崎
  熊本
  大分
  宮崎
  鹿児島
  沖縄
  韓国
  中国
  タイ
  イギリス
  ドイツ
  スイス
  フランス
  ベルギー
  オランダ
  スウェーデン
  ノルウェー
  アメリカ
注記
Includes bibliographical references and index
内容説明・目次
内容説明
This book constitutes the refereed proceedings of the 18th International Conference on Computer Aided Verification, CAV 2006, held as part of the 4th Federated Logic Conference, FLoC 2006. Presents 35 revised full papers together with 10 tool papers and 4 invited papers adressing all current issues in computer aided verification and model checking - from foundational and methodological issues ranging to the evaluation of major tools and systems
目次
Invited Talks.- Formal Specifications on Industrial-Strength Code-From Myth to Reality.- I Think I Voted: E-Voting vs. Democracy.- Playing with Verification, Planning and Aspects: Unusual Methods for Running Scenario-Based Programs.- The Ideal of Verified Software.- Session 1. Automata.- Antichains: A New Algorithm for Checking Universality of Finite Automata.- Safraless Compositional Synthesis.- Minimizing Generalized Buchi Automata.- Session 2. Tools Papers.- Ticc: A Tool for Interface Compatibility and Composition.- FAST Extended Release.- Session 3. Arithmetic.- Don't Care Words with an Application to the Automata-Based Approach for Real Addition.- A Fast Linear-Arithmetic Solver for DPLL(T).- Session 4. SAT and Bounded Model Checking.- Bounded Model Checking for Weak Alternating Buchi Automata.- Deriving Small Unsatisfiable Cores with Dominators.- Session 5. Abstraction/Refinement.- Lazy Abstraction with Interpolants.- Using Statically Computed Invariants Inside the Predicate Abstraction and Refinement Loop.- Counterexamples with Loops for Predicate Abstraction.- Session 6. Tools Papers.- cascade: C Assertion Checker and Deductive Engine.- Yasm: A Software Model-Checker for Verification and Refutation.- Session 7. Symbolic Trajectory Evaluation.- SAT-Based Assistance in Abstraction Refinement for Symbolic Trajectory Evaluation.- Automatic Refinement and Vacuity Detection for Symbolic Trajectory Evaluation.- Session 8. Property Specification and Verification.- Some Complexity Results for SystemVerilog Assertions.- Check It Out: On the Efficient Formal Verification of Live Sequence Charts.- Session 9. Time.- Symmetry Reduction for Probabilistic Model Checking.- Communicating Timed Automata: The More Synchronous, the More Difficult to Verify.- Allen Linear (Interval) Temporal Logic - Translation to LTL and Monitor Synthesis.- Session 10. Tools Papers.- DiVinE - A Tool for Distributed Verification.- EverLost: A Flexible Platform for Industrial-Strength Abstraction-Guided Simulation.- Session 11. Concurrency.- Symbolic Model Checking of Concurrent Programs Using Partial Orders and On-the-Fly Transactions.- Model Checking Multithreaded Programs with Asynchronous Atomic Methods.- Causal Atomicity.- Session 12. Trees, Pushdown Systems and Boolean Programs.- Languages of Nested Trees.- Improving Pushdown System Model Checking.- Repair of Boolean Programs with an Application to C.- Session 13. Termination.- Termination of Integer Linear Programs.- Automatic Termination Proofs for Programs with Shape-Shifting Heaps.- Termination Analysis with Calling Context Graphs.- Session 14. Tools Papers.- Terminator: Beyond Safety.- CUTE and jCUTE: Concolic Unit Testing and Explicit Path Model-Checking Tools.- Session 15. Abstract Interpretation.- SMT Techniques for Fast Predicate Abstraction.- The Power of Hybrid Acceleration.- Lookahead Widening.- Session 16. Tools Papers.- The Heuristic Theorem Prover: Yet Another SMT Modulo Theorem Prover.- LEVER: A Tool for Learning Based Verification.- Session 17. Memory Consistency.- Formal Verification of a Lazy Concurrent List-Based Set Algorithm.- Bounded Model Checking of Concurrent Data Types on Relaxed Memory Models: A Case Study.- Fast and Generalized Polynomial Time Memory Consistency Verification.- Session 18. Shape Analysis.- Programs with Lists Are Counter Automata.- Lazy Shape Analysis.- Abstraction for Shape Analysis with Fast and Precise Transformers.
「Nielsen BookData」 より