System-on-chip test architectures : nanometer design for testability

著者

• Wang, Laung-Terng
• Stroud, Charles E.
• Touba, Nur

書誌事項

System-on-chip test architectures : nanometer design for testability

edited by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba

（The Morgan Kaufmann series in systems on silicon / Peter J. Ashenden, Wayne Wolf, series editors）

Morgan Kaufmann Pub., c2008

注記

Includes bibliographical references and index

詳細情報

• NII書誌ID(NCID): BA83999837
• ISBN:
  • 9780123739735
• LCCN: 2007023373
• 出版国コード: us
• タイトル言語コード: eng
• 本文言語コード: eng
• 出版地: Burlington, Mass.
• ページ数/冊数: xxxvi, 856 p.
• 大きさ: 24 cm
• 分類:
  • LCC : TK7895.E42
  • DC22 : 621.39/5
• 件名:
  • LCSH : Systems on a chip -- Testing
  • LCSH : Integrated circuits -- Very large scale integration -- Testing
  • LCSH : Integrated circuits -- Very large scale integration -- Design
• 親書誌ID:
  • BA52674984