CMOS gate-stack scaling--materials, interfaces and reliability implications : symposium held April 14-16, 2009, San Francisco, California, U.S.A.
著者
書誌事項
CMOS gate-stack scaling--materials, interfaces and reliability implications : symposium held April 14-16, 2009, San Francisco, California, U.S.A.
（Materials Research Society symposium proceedings, v. 1155）
Materials Research Society, c2009
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注記
Other editors: Bill Taylor, H. Rusty Harris, Jeffery W. Butterbaugh, Willy Rachmady
Includes bibliographical references and indexes
"..., 'CMOS gate-stack scaling--materials, interfaces and reliability implications,' held April 14-16 at the 2009 MRS Spring Meeting in San Francisco, California."--Pref.
内容説明・目次
内容説明
To address the increasing demands of device scaling, new materials are being introduced into conventional Si CMOS processing at an unprecedented rate. Presentations collected here focus on understanding, from a chemistry and materials perspective, the mechanism of interface formation and defects at interfaces, for both conventional Si and alternative channel (Ge or III-V) systems. Several papers address reliability concerns for high-k/metal gate (basic physical models, charge trapping, etc.), while others cover characterization of the thin films and interfaces which comprise the gate stack. Topics include: advanced Si-based gate stacks; and alternate channel materials.
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