Low power and reliable SRAM memory cell and array design

Author(s)

    • Ishibashi, Koichiro
    • Osada, Kenichi

Bibliographic Information

Low power and reliable SRAM memory cell and array design

Koichiro Ishibashi, Kenichi Osada, editors

(Advanced microelectronics, 31)

Springer, c2011

  • hbk.

Available at  / 2 libraries

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Note

Includes bibliographical references and index

Description and Table of Contents

Description

Success in the development of recent advanced semiconductor device technologies is due to the success of SRAM memory cells. This book addresses various issues for designing SRAM memory cells for advanced CMOS technology. To study LSI design, SRAM cell design is the best materials subject because issues about variability, leakage and reliability have to be taken into account for the design.

Table of Contents

Preface.- Introduction.- Fundamentals of SRAM Memory Cell.- Electrical Stability.- Sensitivity Analysis.- Memory Cell Design Technique for Low Power SOC.- Array Design Techniques.- Dummy Cell Design.- Reliable Memory Cell Design.- Future Technologies

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Details

  • NCID
    BB07915154
  • ISBN
    • 9783642195679
  • Country Code
    gw
  • Title Language Code
    eng
  • Text Language Code
    eng
  • Place of Publication
    Heidelberg ; London
  • Pages/Volumes
    xi, 143 p.
  • Size
    25 cm
  • Parent Bibliography ID
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